Dual damascene interconnect structures are used to create multi-level, high density metal interconnections needed for advanced, high performance integrated circuits (ICs). Forming dual damascene interconnect structures involves etching one or more dielectric layers, such as layers of silicon oxide, in a pattern to have trenches and vias that may be simultaneously filled with a metal to create the electrical connections from one side of a substrate to the other. In one application, dual damascene processing is used for creating connections in through silicon via (TSV) interposers used as an electrical interface to reroute connections, for example from an IC die, to a different connection, for example to a packaging substrate to which the IC is connected.
Conventional dielectric layers are typically formed of high temperature dielectric materials with the etching step executed in a dielectric etch chamber such as a capacitively coupled plasma reactor. However, as the technology nodes continue to shrink, new materials are being explored and used, such as low temperature dielectrics. However, the inventors have observed that low temperature dielectric materials are softer, and therefore, more difficult to process than high temperature dielectric materials.
Thus, the inventors have provided improved methods for fabricating dual damascene interconnect structures in low temperature dielectric materials.